William Park

University of Waterloo

Undergraduate Research Co-op Waterloo, ON

Worked with Prof. Hiren Patel to design a hardware prefetcher for indirect memory access patterns in RISC-V Vector (RVV) workloads, achieving speedups of up to 2.14x and 1.91x over no prefetching and scalar indirect memory prefetching respectively on sparse linear algebra and graph kernels.

UWASIC Design Team

TinyTracer Team Lead Waterloo, ON

Leading a student team to design and tape out the first programmable ray-tracing ASIC on Tiny Tapeout. Designed the instruction set architecture, defining scalar and vector instruction encodings, the scene data format, and how vector operations decompose into scalar operations. Defined the system architecture from scene loading to frame rendering, producing a block diagram, memory map, and RTL module templates for each functional block. Established inter-block communication interfaces, including ready/valid handshaking, endianness, and instruction and data widths, enabling independent RTL development.

Kiwi Charge

Electrical Engineering Intern Toronto, ON

Built a ROS2-based CAN teleoperation pipeline for a four-wheel differential-drive prototype and designed its electrical schematic (power distribution, motor drivers, CAN, sensor integration). Designed an electrical schematic for the prototype, including power distribution, motor driver interfaces, CAN bus communication, and sensor integration, enabling reliable bring-up and debugging.